Energy per MAC: Photonics vs Electronics

Every photonic AI press release converges on the same sentence: "orders of magnitude more efficient than GPUs." This closing lesson of the module is the audit. The method is an itemised ledger: write down every energy consumer between a digital number entering the accelerator and a digital number leaving it, divide by the MACs performed, and compare the total — not the flattering subtotal — against the electronic baseline it must beat: the tensor core, whose INT8 multiply–accumulate circuit costs a few tens of femtojoules. The conclusion, stated up front because this course does not bury its ledes: the optical MAC itself is nearly free; the bill is dominated by the electronic–optical boundary — above all the DACs and ADCs — and photonics wins only where that boundary cost can be amortised over enough optics: large matrices, low precision, high weight reuse. Everywhere else, the tensor core keeps its crown.

The itemised ledger

Line item	Typical energy	Charged per…	Notes
Digital INT8 MAC (7 nm)	~20–30 fJ	MAC	The circuit alone; with SRAM traffic the system figure is ~0.1–1 pJ
Laser light	≥ shot-noise floor (lesson 5)	detection	Divide by wall-plug efficiency 10–20%: each optical joule costs 5–10 electrical
Modulator	~10–100 fJ	input symbol	Ring modulators at the low end, Mach–Zehnder modulators higher
Detector + TIA	~10–100 fJ	output sample	The transimpedance amplifier, not the photodiode, dominates
DAC (8-bit, GS/s)	~0.5–2 pJ	input symbol	One per input channel per symbol
ADC (8-bit, GS/s)	~1–5 pJ	output sample	The single biggest line; energy grows 2–4× per extra bit
Weight tuning (thermal)	~mW static per element	—	Lesson 3's bill: at 10 GHz, 3 mW ≈ 0.3 pJ per element per symbol unless amortised

Look at the units in the third column — that is where the argument lives. The converter costs are charged per symbol per channel, but an N \times N matvec performs N^2 MACs on just N input symbols and N output samples. Each conversion is therefore shared by N MACs:

for an N \times N matvec with per-MAC optical cost E_{\text{opt}} and total conversion cost C = E_{\text{DAC}} + E_{\text{mod}} + E_{\text{det}} + E_{\text{ADC}} per input–output pair, E_{\text{MAC}} \;=\; E_{\text{opt}} \;+\; \frac{C}{N};
against a digital baseline E_{\text{dig}}, the crossover size is N^{*} \;=\; \frac{C}{E_{\text{dig}} - E_{\text{opt}}} \; ; below N^{*} the converters make photonics worse than digital, above it the amortisation wins;
E_{\text{opt}} cannot be driven to zero: the shot-noise floor ties it to the required precision (~13 fJ of light per 8-bit detection, ~0.05 fJ per 4-bit, before wall-plug division);
the formula assumes the weights are reused — reprogramming phases costs extra energy and time charged against however many vectors used that matrix.

Play with the slider and internalise the geometry: the entire competitive position of photonic computing is the height of that conversion cost and the size of the N you can field. This is the roofline model's lesson wearing new clothes — replace "bytes from DRAM" with "conversions at the boundary" and N is the arithmetic intensity: optics only pays when each crossing of the boundary feeds enough arithmetic on the far side.

Worked example: an honest win, of the unglamorous size

Price a good near-term system: N = 256, 6-bit precision, 10 GHz. Shot noise wants ~2,600 photons per 6-bit detection — 0.33 fJ optical, ~2 fJ electrical at 17% wall-plug; add detector-referred margins and call the optical side E_{\text{opt}} \approx 5 fJ per MAC. Converters: a 6-bit DAC + ring modulator + TIA + 6-bit ADC at ~2 pJ for the pair of boundary crossings. Then

E_{\text{MAC}} \;=\; 5\ \mathrm{fJ} + \frac{2000\ \mathrm{fJ}}{256} \;\approx\; 13\ \mathrm{fJ},

versus ~30 fJ for the bare INT8 tensor-core circuit and ~100–200 fJ for the electronic system with its SRAM traffic. That is a genuine win of 2× to 10× — real, worth having, and nothing like the 100–1000× of the press releases. The crossover arithmetic shows why: N^{*} = 2000/(30 - 5) = 80, so a 64×64 chip with those converters loses to the tensor core it was built to replace. And the win is conditional on all three amortisations holding at once: N large (die area, loss budget and calibration permitting), precision low (shot floor and ADC energy both scale viciously with bits), and the weight matrix reused across enough vectors that programming it — and holding it, at milliwatts per thermal element — is a rounding error. Break any leg of the tripod and the advantage evaporates.

You now have the tools to dismantle the standard misleading benchmark. A headline "photonic chip: 400 TOPS/W" typically commits several sins at once. It counts operations (a MAC is 2 OPS, instantly doubling the figure). It divides by the power of the photonic component only — the laser is "off-chip" and excluded, the DACs and ADCs belong to "the interface" and are excluded, the thermal tuning is "static" and excluded — even though the theorem above says the excluded parts are precisely the dominant costs. It quotes peak throughput at a precision it does not state (4-bit TOPS are cheap; 8-bit TOPS cost 4–16× more at the ADC). And it compares against a GPU's system power, converters and DRAM included. Convert honestly: E fJ per op is 1000/E TOPS/W, so 400 TOPS/W claims 2.5 fJ per op — 5 fJ per MAC — which the ledger shows is barely the optical line item alone at 8-bit precision, before a single converter is powered. The question that cuts through every such claim is one sentence: "Is that figure measured from digital input to digital output, at stated precision, converters, laser and tuning included?" If the answer is yes, you are reading a serious paper — the systems module's benchmarking lesson collects the ones that pass.

Why pick on the ADC? Because it is the component with the worst physics and the slowest progress. Surveys of every ADC published since the 1970s (Walden's, continued by Murmann) show energy per conversion scaling roughly as \mathrm{FOM} \times 2^{\mathrm{ENOB}} — exponential in bits, with the figure of merit improving by barely an order of magnitude per decade, glacial next to logic's historical scaling. The exponential is not laziness: each extra bit halves the tolerable comparator noise, quadrupling the energy of every comparison (the same 4\times-per-bit law as lesson 5's photon budget — both are thermal-noise statistics in disguise). This is why serious photonic-accelerator research is, to a surprising degree, converter research: fewer conversions (deeper analog chains between digitisations), cheaper conversions (low-bit, time-interleaved, co-designed ADCs), or none at all (analog outputs feeding analog next stages). The device that made light compute was the MZI; the device that decides whether it was worth it is the ADC.

Module 5, closed out

The module in one paragraph: meshes and crossbars make the linear algebra of neural networks nearly free per MAC; wavelengths multiply the parallelism; rings shrink the weights; the nonlinearity, the noise floor, the training gap and the conversion ledger are the four honest taxes on the dream. Nothing in the taxes says "impossible" — they say "wins are conditional, and the conditions are quantitative". The next module widens the lens: photonics can compute more than matvecs, and a single lens turns out to perform a Fourier transform — for free, in femtoseconds — opening the world of analog optical processors, correlators and Ising machines.