Every technology in this course has to answer a brutal question before its physics even gets a
hearing: who is going to manufacture it? The semiconductor industry has spent sixty years
and trillions of dollars learning to pattern silicon with nanometre fidelity, at billions of devices
per wafer, with yields
1. A huge index contrast. Silicon's refractive index near 1.55 µm is
| Platform | Core / cladding index | Typical bend radius | Waveguide loss |
|---|---|---|---|
| Optical fibre | 1.450 / 1.444 | ~cm | 0.0002 dB/m |
| Silica on silicon (PLC) | 1.46 / 1.44 | ~5 mm | ~0.02 dB/m |
| Silicon nitride | 2.0 / 1.44 | ~100 µm | ~0.1–1 dB/m |
| Silicon (SOI) | 3.48 / 1.44 | ~5 µm | ~100–200 dB/m |
Read the table as a trade: each step up in contrast buys a ~1000× smaller bend — and therefore ~1000× more components per chip — at the price of higher loss, because a tightly-held mode presses hard against the core walls and scatters off every nanometre of sidewall roughness. (Note the units flip from dB/km to dB/m: on-chip guides are a million times lossier than fibre, which is fine, because they are also a million times shorter.)
2. Transparency exactly where fibre wants it. Silicon is a
3. Someone else already built the fab. A 220 nm waveguide is a big, easy feature for lithography that routinely draws 20 nm transistor geometries. Silicon photonics borrows the 193 nm scanners, the etchers, the metrology, the 300 mm wafers and the yield discipline of CMOS — which is why a photonic chip with thousands of components can be ordered from a commercial foundry today, while exotic-material photonics still counts components in dozens. Check the transparency argument yourself:
The germanium column is the punchline-in-waiting: transparent silicon cannot detect light at 1.55 µm (no absorption means no photocurrent), so foundries grow small islands of germanium — whose 0.66 eV gap does absorb telecom photons — right on the silicon waveguide wherever a photodetector is needed. The platform's gaps get patched by its neighbours in group IV.
A waveguide needs low-index material on every side — including underneath. A silicon strip sitting directly on a silicon wafer would be a core touching an identical-index slab: no total internal reflection downwards, and the light drains into the substrate within micrometres. The platform's namesake fix is the silicon-on-insulator (SOI) wafer: a thin single-crystal silicon film held above the bulk wafer by a buried layer of oxide. Etch the film into strips, bury the strips in more oxide, and every waveguide is silicon wrapped in silica on all four sides.
Every number in the stack earns its place. The BOX is ~2 µm because the previous lesson's evanescent tails reach a few hundred nanometres — thin the BOX to 500 nm and the tail touches the handle wafer, which acts as an index-matched drain and quietly siphons the light away. The device layer's 220 nm is thin enough (by the single-mode arithmetic of two lessons ago) to hold exactly one vertical mode. And the strip's ~500 nm width holds exactly one horizontal mode while keeping it firmly confined for tight bends.
Two refusals, both rooted in fundamentals, shape the whole industry.
Silicon cannot make light. Its band gap is indirect: the bottom of the conduction band and the top of the valence band sit at different crystal momenta, so an electron cannot drop across the gap and emit a photon without a phonon making up the momentum difference — a three-body coincidence so unlikely that an excited electron in silicon almost always sheds its energy as heat instead. No amount of pumping turns silicon into a laser diode. Every photonic chip therefore imports its light: an external laser module, or a sliver of indium phosphide (direct gap, happy to lase) bonded onto the silicon wafer. "Where does the laser go?" remains the platform's defining packaging question.
Silicon cannot switch itself quickly by field alone. The fastest, cleanest way to change a material's refractive index is the linear electro-optic (Pockels) effect — apply a voltage, the index shifts, no charge moves. But the Pockels effect exists only in crystals without inversion symmetry, and silicon's diamond lattice is perfectly centrosymmetric: its Pockels coefficient is exactly zero. Silicon modulators must instead inject or deplete free carriers, which is slower, lossier and tangled up with amplitude changes — engineering consequences that the modulator lesson in the next module inherits wholesale.
Ask why the device layer is 220 nm and you will hear physics-sounding justifications — single-mode! polarisation behaviour! — but the honest answer is that in the early 2000s the Belgian research fab imec standardised its multi-project-wafer runs on 220 nm SOI, partly because that thickness handled both TE and TM light tolerably for the sensor work then in fashion. Designs accumulated, process design kits froze, component libraries calcified, and two decades later much of the industry still designs to a thickness chosen for other people's experiments. (Several foundries now quietly prefer 300 nm or thicker layers, which bend light even better — but must support 220 nm forever.) It is a perfect miniature of a lesson every computing platform teaches eventually, from the 8086 instruction set to the QWERTY keyboard: ecosystems standardise on whatever was there when the ecosystem formed, and physics only gets a vote at the founding.
Band-gap transparency killed absorption; it said nothing about scattering. Look back at the table: SOI waveguides lose ~2 dB/cm — a million times worse per metre than fibre — and almost all of it is Rayleigh-type scattering off nanometre-scale roughness left on the strip's sidewalls by etching, made vicious by the very index contrast that makes silicon attractive (the mode's field is intense exactly at the rough walls). This is the fine print in "CMOS fabs can make photonics": a lithography process proud of ±2 nm dimensional control can still leave sidewalls whose roughness matters, because photonics grades roughness on a different curve than transistors do. A second helping of fine print: silicon is transparent at 1.55 µm only at sane power levels. Push tens of milliwatts into a 0.1 µm² core and pairs of photons team up to jump the gap — two-photon absorption — which sets a real power ceiling for the analog accelerators later in this course.
The balance sheet, then: silicon offers unmatched density, telecom-window transparency and a
borrowed trillion-dollar fab, in exchange for imported lasers, carrier-based modulators, germanium
detectors and constant vigilance about roughness and power. The course accepts the deal — as has
the industry. But a chip full of perfect waveguides is useless if light cannot get on and off it,
and the numbers are forbidding: a fibre mode ~9 µm across must somehow pour into a silicon strip
twenty times smaller. Bridging that gap — with gratings that diffract light out of the surface and
tapers that inflate the mode at the chip's edge — is the