Here is an embarrassment the brochures skip. A silicon photonic chip can guide, bend and split light with exquisite control — but first the light must get onto the chip, and it arrives by optical fibre wearing entirely the wrong size. A standard fibre's mode is a soft Gaussian blob about 9\ \mu\text{m} across; the silicon waveguide's mode is roughly 0.5 \times 0.25\ \mu\text{m} — a mismatch of nearly 1000 in area. Butt the fibre against the chip edge and almost none of the light takes the handoff: the fibre's broad field simply does not fit the waveguide's tiny one. Photonic engineers call the fix a coupler, they measure its quality as insertion loss in dB, and in many real products the couplers waste more light than everything else on the chip combined. This lesson is about the two classic fixes — diffract the light out of the surface, or inflate the mode at the edge — and the dB bookkeeping that decides whether a link works at all.

Why size mismatch kills coupling

The deep rule (it will be an inner product when the course turns linear-algebraic): the fraction of power that transfers from one guided mode to another is set by the overlap of their field shapes. Two Gaussian spots of radii w_1 and w_2, perfectly aligned, couple with efficiency

Identical spots give \eta = 1; mismatched spots are punished fast. Put in the real numbers — fibre w_1 = 4.5\ \mu\text{m}, silicon wire w_2 \approx 0.25\ \mu\text{m}:

Direct butt coupling throws away 99% of the light — per facet, and a link has two facets. No photonic system survives a −38 dB toll. Every practical coupler is a machine for making the two mode shapes meet in the middle.

Fix 1: the grating coupler — light through the surface

The first fix ignores the chip's edge entirely and fires light out of its face. Etch the end of a (widened) waveguide into a corrugation — a row of shallow teeth with period \Lambda — and the structure becomes a diffraction grating for the guided mode: each tooth scatters a wavelet, and the wavelets reinforce along the directions where successive teeth contribute in phase. One condition picks the beam's angle \theta (from the chip's normal, into a cover material of index n_c):

the grating equation with the guided mode's effective index — last lesson's n_{\text{eff}} earning its keep — supplying the phase advance from tooth to tooth. Design it backwards: aiming at a fibre tilted 10^\circ in air (n_c = 1, \sin\theta = 0.17), with the grating region's n_{\text{eff}} \approx 2.85 at \lambda = 1.55\ \mu\text{m}:

A grating coupler delivers a typical 3–5 dB of insertion loss (state-of-the-art designs reach ~1 dB), and its killer feature is not optical at all: it works anywhere on the chip's face, before the wafer is ever cut. A probe station can lower fibres onto thousands of dies in turn and test every circuit at wafer scale — inherited quality-control discipline no edge-based scheme can match. The price: diffraction is inherently wavelength-selective (the equation ties \theta to \lambda), so a grating passes only a ~30–40 nm band well, and it is polarisation-picky to boot.

Fix 2: the edge coupler — inflate the mode

The second fix meets the fibre at the chip's edge, but reshapes the mode first. Near the facet the silicon wire is drawn down into an inverse taper: the core narrows from 500 nm to a sharp ~80 nm tip. Recall the moral of the modes lesson — shrink the core and the mode swells into the cladding. By the tip, the light barely notices the sliver of silicon and rides a fat, fibre-sized mode in the surrounding oxide, often boxed in a lower-index overlay that acts as a transitional waveguide. Done gently (adiabatically), the transformation is nearly lossless: edge couplers reach 1–2 dB per facet, work across hundreds of nanometres of bandwidth, and treat both polarisations evenhandedly. Their price is geometric: they exist only at the chip's perimeter, they demand polished or etched facets and sub-micrometre alignment, and none of it can be tested until the wafer is diced. Grating or taper is thus a genuine engineering fork: testability and placement freedom versus bandwidth and loss — datacenter transceivers have historically leaned on gratings; broadband and high-power links lean on edges.

The insertion-loss budget

Now assemble a link the way an engineer signs off on one: as a dB budget, every component debited against the launch power. Decibels turn the chain of multiplied fractions into a column of subtractions — one reason the trade never quotes anything in percent:

Verdict: 22 dB of insertion loss; a +10 dBm launch reaches the detector at −12 dBm (63 µW) — fine if the receiver's sensitivity is, say, −20 dBm, with 8 dB of margin left for ageing, temperature and pessimism. Note where the budget bled: the two couplers alone cost 8 dB — more than a third of the total — which is the normal state of affairs and the reason coupler design remains a research industry. Budgets like this recur all course long (a photonic accelerator's depth is capped by exactly this arithmetic), so make the reflex automatic:

Where this goes next

Light can now enter the chip, survive its journey, and leave — with a budget documenting every dB. But so far the chip is a single corridor. Computing needs fan-out: taps, combiners, 50:50 splits, and a way for two waveguides to trade light with each other in controlled proportions. The final lesson of this module builds those wiring primitives from the evanescent tails you met two lessons ago — and hands the course its first genuinely computational component.