Power and the Power Wall
The end of
Dennard scaling
left the industry facing a single, brutal constraint: you can only remove so many watts of heat
from a chip. A modern desktop CPU dissipates around 100\text{–}150\,\text{W}
from a piece of silicon smaller than a postage stamp — a heat flux rivalling a kitchen hotplate. Push past
what the cooler can carry and the chip throttles or cooks. This ceiling is the power wall,
and it, not transistor count, is the true limit on modern performance. To understand it you need the
equation that governs where the watts come from.
Dynamic power: the cost of switching
Most of a chip's power goes into switching transistors — charging and discharging the
tiny capacitances of gates and wires. Every time a node flips, it moves charge through the supply voltage
V, and the energy to charge a capacitance C is
\tfrac12 C V^2. Do that f times per second, on a
fraction \alpha of nodes that actually flip (the activity factor), and
you get the master equation of low-power design:
P_{\text{dynamic}} \;=\; \tfrac12\,\alpha\, C\, V^2 f.
Stare at the exponents, because they decide everything. Power grows linearly with
frequency f and capacitance C, but with the
square of voltage V. Voltage is the dominant knob: halving
V cuts power to a quarter. This is why, back when Dennard scaling let
voltage keep dropping, you could raise the clock and stay cool. And it is why, once voltage
stopped scaling, the whole game broke.
Why cranking the clock hit a wall
Here is the crux, in one chart. If you could raise the frequency at a fixed voltage, power would
only rise linearly (P \propto f) — annoying but survivable. But
a faster clock needs the transistors to switch faster, which in practice demands a higher voltage
too. With V forced to rise roughly with f, the
V^2 f term becomes \sim f^3 — power grows with the
cube of the clock. Drag the capacitance slider and compare the two curves: the cubic one
rockets straight into the thermal ceiling. Doubling the clock this way costs roughly
8\times the power. That is the power wall.
Static power: the leak that never sleeps
Dynamic power is only half the story. A modern transistor is an imperfect switch: even when "off", a small
leakage current trickles through it, burning static power
P_{\text{static}} = V \cdot I_{\text{leak}} whether or not anything useful is
happening. As transistors shrank and threshold voltages dropped, leakage grew until it became a large slice
of the total — which is precisely what stopped voltage from scaling further, since lowering the
threshold to allow a lower V makes leakage explode. Total chip power is the sum:
- Dynamic (switching): P_{\text{dyn}} = \tfrac12\,\alpha C V^2 f
— grows with the square of voltage and linearly with clock;
- Static (leakage): P_{\text{static}} = V I_{\text{leak}}
— burnt continuously, even when idle;
- Total: P = P_{\text{dyn}} + P_{\text{static}}, and it is
capped by a hard thermal limit — the power wall.
Worked example — and why two slow cores beat one fast core
Suppose you want twice the throughput. Option A: run one core at double the frequency — but that needs,
say, a 20\% higher voltage. Power scales by
V^2 f = 1.2^2 \times 2 = 1.44 \times 2 = 2.88\times. Nearly triple the power for
double the work — straight into the wall.
Option B: use two cores at the original frequency, and because you no longer need speed
you can lower the voltage by, say, 15\%. Each core now burns
0.85^2 = 0.72\times its old power, so two of them cost
2 \times 0.72 = 1.44\times — half the power of Option A for the same work. The
quadratic V^2 is the whole reason: many cores at low voltage crush one core at
high voltage. This single inequality is why every phone and laptop went multicore. Run the numbers:
// Dynamic power P = 0.5 * activity * C * V^2 * f (relative units).
function dynPower(activity: number, c: number, v: number, f: number): number {
return 0.5 * activity * c * v * v * f;
}
const a = 1, C = 1; // normalized activity and capacitance
const base = dynPower(a, C, 1.0, 1.0);
console.log(`baseline (V=1.0, f=1.0): ${base.toFixed(3)}`);
// Option A: one core, 2x frequency needs 1.2x voltage.
const fast = dynPower(a, C, 1.2, 2.0);
console.log(`one fast core (V=1.2, f=2.0): ${fast.toFixed(3)} = ${(fast / base).toFixed(2)}x power`);
// Option B: two cores at f=1.0 but V lowered to 0.85.
const twoCores = 2 * dynPower(a, C, 0.85, 1.0);
console.log(`two slow cores (V=0.85, f=1.0, x2): ${twoCores.toFixed(3)} = ${(twoCores / base).toFixed(2)}x power`);
console.log(`two cores use ${((1 - twoCores / fast) * 100).toFixed(0)}% less power for the SAME throughput`);
This is the era of dark silicon. Moore's law keeps handing us more transistors, but the
power wall means we can only afford to power a fraction of them at full speed simultaneously — the
rest must stay "dark" (powered down) at any given moment. On a modern chip a large share of the silicon is
idle at any instant. Architects turned this constraint into a strategy: fill the dark area with
specialised accelerators — a video decoder, a neural engine, an encryption block — that sit dark
until their one job appears, then light up and do it far more efficiently than the general CPU could. Your
phone's system-on-chip is mostly dark silicon by design, and that is why it sips battery while still
decoding 4K video. The power wall didn't just slow us down; it changed what we build.
A classic confusion: "this chip uses more power, so it drains my battery faster." Not necessarily.
Power (watts) is the rate of energy use; energy (joules) is
\text{power} \times \text{time}. Battery life depends on energy per
task, not peak power. A high-power core that finishes the job in a quarter of the time and then sleeps can
use less total energy than a low-power core that plods along — the famous "race to
idle". Cooling and the power wall care about instantaneous power (heat you must remove
right now); battery life cares about energy. They pull in different directions, and conflating
them leads to genuinely wrong design decisions. Always ask: watts, or joules?
The wall that reshaped everything
The power wall is the quiet protagonist of modern architecture. It is why clocks froze at a few gigahertz,
why chips went
parallel,
why efficiency is now quoted as performance per watt, why laptops throttle, and why so much
silicon is dark. Every trick in the rest of this course — clever caches, out-of-order execution,
accelerators — is ultimately judged not just by "is it faster?" but by "is it faster per joule,
within the power budget?" Transistors are cheap; watts are the currency now.